1. Field of the Invention
The invention relates to a reference voltage generator circuit for generating a reference voltage or voltages to be used in a converter, such as an A/D or a D/A converter, and more particularly, to a generator circuit for providing reference voltages to a plurality of systems.
2. Description of the Related Art
As shown in FIG. 1, a conventional reference voltage generator circuit 10 comprises a rough resistor bank 11 including a pair of resistors RI of an equal resistance, and a first and second fine resistor bank 12, 13 each including four resistors R2 of an equal resistance.
The resistors R1 are connected in series between a high potential side reference voltage Vref1, and a low potential side reference voltage Vref2. The first resistor bank 12 is connected in shunt with the resistor R1 located toward the reference voltage Vref1, and the second resistor bank 13 is connected in shunt with the resistor R1 located toward the reference voltage Vref2. Each of the resistor banks 12, 13 includes four resistors R2 connected in series.
A potential difference between the reference voltages Vref1, Vref2 is equally divided across each resistor R1, and the voltage across each resistor R1 is divided into four equal fractions across each resistor R2. Nodes N1 to N9 are defined at junctions between each resistor R1 and its adjacent resistor R2 as well as at junctions between respective adjacent resistors R2 in the order of descending potential, as shown.
Each of the nodes N1 to N3 is connected to a circuit A1 in a subsequent stage via respective switches SA1, and is also connected to a circuit B1 in a subsequent stage via respective switches SB1. Each of the nodes N3 to N5 is connected to a circuit A2 in a subsequent stage via respective switches SA2, and is also connected to a circuit B2 in a subsequent stage via respective switches SB2. Each of the nodes N5 to N7 is connected to a circuit A3 in a subsequent stage via respective switches SA3, and is also connected to a circuit B3 in a subsequent stage via respective switches SB3. Each of the nodes N7 to N9 is connected to a circuit A4 in a subsequent stage via respective switches SA4, and is also connected to a circuit B4 in a subsequent stage via respective switches SB4. The circuits A1 to A4 and the circuits B1 to B4 (not shown) are comparators associated with independent A/D converters.
A select signal generator circuit 14 generates select signals xcfx86A1 to xcfx86A4 and xcfx86B1 to xcfx86B4 which actuate corresponding switches SA1 to SA4 and SB1 to SB4. Thus, each of the switches SA1 to SA4 and SB1 to SB4 is turned on or off in response to a corresponding one of the select signals (xcfx86A1 to xcfx86A4 and xcfx86B1 to xcfx86B4. In this manner, potentials at the respective nodes N1 to N9 are provided as reference voltages to the circuits A1 to A4 and B1 to B4.
It is to be noted that as the selected switches SA1 to SA4 and SB1 to SB4 are turned on or off, switching noise occurs. For example, assuming that the switches SA1 are turned on in response to the select signal xcfx86A1, if the switches SB1 are then turned on in response to the select signal xcfx86B1, the operation of the switches SB1 produces switching noises at the nodes N1 to N3. In this instance, the node N3 exhibits a higher impedance with respect to the reference voltages Vref1, Vref2 than the nodes N1, N2, and consequently a noise level at the node N3 is higher than at the nodes N1, N2. This causes an unstable reference voltage of a reduced accuracy to be provided to the circuit A1 connected to the node N3, such that the circuit A1 may malfunction.
To overcome such a problem, a separate reference voltage generator circuit 10 may be provided for each group of circuits A1 to A4 and B1 to B4. when so arranged, there is only one switch associated with each node, thus avoiding adverse influences of one of the switches upon another of the switches.
However, such an arrangement has greatly increased circuit area. In addition, the high potential side and the low potential side reference voltages must be provided to individual reference voltage generator circuits, and accordingly, the reference voltages may vary from reference voltage generator circuit to reference voltage generator circuit due to wiring resistances, resulting in a variation in the magnitude of reference voltages provided to the individual reference voltage generator circuits. In order to reduce such a variation in the reference voltages, it is preferred that common reference voltages be delivered in parallel from a single reference voltage generator circuit.
It is an object of the present invention to provide a reference voltage generator circuit capable of providing a stable reference voltage.
To achieve the above objective, the present invention provide a reference voltage generator circuit for delivering a reference voltage to a plurality of systems including a first system and a second system, comprising: a rough resistor bank including at least one resistor connected in series between a high potential side reference voltage and a low potential side reference voltage; a first fine resistor bank including a plurality of resistors connected in shunt with at least on resistor of the rough resistor bank; a second fine resistor bank including a plurality of resistors connected in shunt with the at least one resistor in the rough resistor bank; a first group of switches connected between nodes between respective resistors in the first fine resistor bank and the first system; and a second group of switches connected between nodes between respective resistors in the second fine resistor bank and the second system.
The present invention further provides a reference voltage generator circuit for delivering reference voltages to a plurality of systems including a first system and a second system, comprising: a first rough resistor bank including at least one resistor and a second rough resistor bank including at least two resistors, the first and second rough resistor bank connected in parallel with each other between a high potential side and a low potential side reference voltage; a first fine resistor bank connected between the first and second rough resistor banks and connected in shunt with the at least one resistor bank in the first rough resistor and extending between the at least one resistor and a junction between at least two resistors in the second rough resistor bank; a second fine resistor bank connected in parallel with the first fine resistor bank; a first group of switches connected between nodes between adjacent resistors in the first fine resistor bank and the first system; and a second group of switches connected between nodes between adjacent resistors in the second fine resistor bank and the second system.
The present invention provides a reference voltage generator circuit for delivering reference voltages to a plurality of systems including a first system and a second system, comprising: a rough resistor bank including at least two resistors connected in series between a high potential side reference voltage and a low potential side reference voltage; a first fine resistor bank including a plurality of series connected resistors connected in shunt with one of the resistors in the rough resistor bank; a second fine resistor bank including a plurality of series connected resistors connected in shunt with one of the resistors in the rough resistor bank; a first group of switches connected between nodes between adjacent resistors in the first fine resistor bank and the first system; a second group of switches connected between nodes between adjacent resistors in the second fine resistor bank and the second system; and a selection circuit for selectively connecting each of the first and second fine resistor banks to one of the resistors in the rough resistor bank.
The present invention further provides a reference voltage generator circuit for delivering reference voltages to a plurality of systems including a first system and a second system, comprising: a rough resistor bank connected in series between a high potential side and a low potential side different voltage; a first fine resistor bank connected in shunt across a plurality of resistors in the rough resistor bank; a second fine resistor bank connected in shunt with the plurality of resistors in the rough resistor bank; a third fine resistor bank connected in shunt with one of the resistors in the rough resistor bank; a fourth fine resistor bank connected in shunt with one of the resistors in the rough resistor bank; a first group of switches connected between nodes between adjacent resistors in the first fine resistor bank and the first system; a second group of switches connected between nodes between adjacent resistors in the second fine resistor bank and the second system; a third group of switches connected between nodes between adjacent resistors in the third fine resistor bank and the first system; and a fourth group of switches connected between nodes between adjacent resistors in the fourth fine resistor bank and the second system.
Other aspects and advantages of the invention will become apparent from the following description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.